A quantitative measure of the limited amount of information that an agent can actively hold and manipulate for ongoing cognitive computations, shaping reasoning, attention, and learning performance in AI systems.
Working Memory Capacity (WMC) denotes the effective-size constraint on an agent’s short-term, manipulable state used for holding representations during processing—analogous to human working memory but treated as a tunable architectural and functional parameter in AI. For AI researchers this concept captures both a theoretical bottleneck (limited slots, finite precision, interference) and an engineering trade-off (memory cost vs. generalization and throughput). WMC is operationalized in cognitive architectures (e.g., ACT-R, Soar) as discrete buffers or activation-limited stores, and in contemporary ML as constrained hidden-state dimensionality, limited attention windows, fixed-size external memory slots, or budgeted retrieval mechanisms that directly affect sequence-processing, reasoning depth, and sample efficiency. Theoretical accounts link WMC to executive-control capacity and interference management (e.g., the executive-attention view), which in AI translates to gating, selective attention, and memory-based routing policies; empirically, limiting WMC alters error types, catastrophic forgetting behaviors, and the emergence of strategies such as chunking and compression. Practically, explicit control of WMC informs design choices for on-device models, continual learning agents, and neuro-symbolic systems where bounded working memory enforces human-like constraints that can improve interpretability and human-model alignment while exposing failure modes relevant for safety and evaluation.
First use: rooted in cognitive psychology literature from the 1970s (Baddeley & Hitch, 1974); term "working memory capacity" gained prominence in cognitive science through the 1980s–1990s (e.g., Engle, Cowan) and adoption in AI increased from the 1990s onward, accelerating with memory-augmented neural models and attention-based architectures in the 2010s.